Cache MSRs that should be reset in default case

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DCO

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build-test (hyperv-ws2025, amd, X64, debug) / build-and-test

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build-test (hyperv-ws2025, intel, X64, debug) / build-and-test

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run-examples (hyperv-ws2025, intel, X64, debug) / run-examples

run-examples (hyperv-ws2025, intel, X64, release) / run-examples

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run-examples (kvm, amd, X64, debug) / run-examples

run-examples (kvm, amd, X64, release) / run-examples

run-examples (kvm, intel, X64, debug) / run-examples

run-examples (kvm, intel, X64, release) / run-examples

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