cython: add build-cython.yml for riscv64 wheels

.github/workflows/build-cython.yml

@@ -0,0 +1,97 @@
+# SPDX-FileCopyrightText: 2026 The RISE Project
+# SPDX-License-Identifier: MIT
+---
+# This workflow is based on the `build_wheels` job in:
+# https://github.com/cython/cython/blob/3.3.0/.github/workflows/wheels.yml
+name: Build cython wheels (riscv64)
+
+on:
+  workflow_dispatch:
+    inputs:
+      version:
+        description: 'cython version to build (git tag, e.g. 3.3.0)'
+        required: true
+        default: '3.3.0'
+  pull_request:
+    paths:
+      - '.github/workflows/build-cython.yml'
+      - 'patches/cython/**'
+
+concurrency:
+  group: ${{ github.workflow }}-${{ inputs.version || '3.3.0' }}-${{ github.head_ref || github.run_id }}
+  cancel-in-progress: true
+
+permissions:
+  contents: read  # to fetch code (actions/checkout)
+
+env:
+  # `inputs.version` is empty on pull_request events; default there.
+  CYTHON_VERSION: ${{ inputs.version || '3.3.0' }}
+  MANYLINUX_RISCV64_IMAGE: quay.io/pypa/manylinux_2_39_riscv64
+
+jobs:
+  build_wheels:
+    name: Build cython ${{ inputs.version || '3.3.0' }} ${{ matrix.python }}-manylinux_riscv64
+    runs-on: ubuntu-24.04-riscv
+    timeout-minutes: 600
+    strategy:
+      fail-fast: false
+      matrix:
+        # No cp314t: setup.py disables self-compilation under Py_GIL_DISABLED.
+        python: ["cp312", "cp313", "cp314"]
+
+    steps:
+      - name: Checkout cython ${{ env.CYTHON_VERSION }}
+        uses: actions/checkout@9c091bb21b7c1c1d1991bb908d89e4e9dddfe3e0  # v7.0.0
+        with:
+          repository: cython/cython
+          ref: ${{ env.CYTHON_VERSION }}
+          persist-credentials: false
+
+      - name: Checkout python-wheels
+        uses: actions/checkout@9c091bb21b7c1c1d1991bb908d89e4e9dddfe3e0  # v7.0.0
+        with:
+          path: python-wheels
+          persist-credentials: false
+
+      # Without a riscv64 override the build inherits upstream's x86 `-march=core2` CFLAGS.
+      - name: Patch cython source
+        run: git apply python-wheels/patches/cython/${{ env.CYTHON_VERSION }}/*.patch
+
+      - name: Build wheels
+        uses: pypa/cibuildwheel@1828c10ab37f080699c7b81cea34097c684a7074  # v4.2.0
+        with:
+          output-dir: wheelhouse/
+          only: ${{ matrix.python }}-manylinux_riscv64
+        env:
+          CIBW_MANYLINUX_RISCV64_IMAGE: ${{ env.MANYLINUX_RISCV64_IMAGE }}
+          # Stage only runtests.py + tests/ so the installed wheel is imported, not the source tree.
+          CIBW_TEST_REQUIRES: setuptools
+          CIBW_TEST_COMMAND: >-
+            cp -r {package}/runtests.py {package}/tests . &&
+            python runtests.py -vv --no-code-style --no-cleanup
+            -x Debugger --backends=c,cpp -j$(nproc) --work-dir=TEST_TMP
+
+      - uses: actions/upload-artifact@043fb46d1a93c77aae656e7c1c64a875d1fc6a0a  # v7.0.1
+        with:
+          name: cython-${{ env.CYTHON_VERSION }}-${{ matrix.python }}-manylinux_riscv64
+          path: wheelhouse/*.whl
+          if-no-files-found: error
+
+  publish:
+    name: Publish cython ${{ inputs.version || '3.3.0' }} to GitLab
+    needs: [build_wheels]
+    runs-on: ubuntu-latest
+    permissions:
+      contents: write
+      pull-requests: write
+
+    steps:
+      - name: Publish wheels and open docs PR
+        uses: riseproject-dev/python-wheels/actions/publish-wheels@main
+        with:
+          artifact-pattern: cython-${{ env.CYTHON_VERSION }}-*-manylinux_riscv64
+          gitlab-username: ${{ vars.GITLAB_DEPLOY_USER }}
+          gitlab-token: ${{ secrets.GITLAB_DEPLOY_TOKEN }}
+          gitlab-project-id: ${{ vars.GITLAB_PROJECT_ID }}
+          gh-token: ${{ secrets.GITHUB_TOKEN }}

patches/cython/3.3.0/0001-Add-riscv64-cibuildwheel-environment-override.patch

@@ -0,0 +1,43 @@
+From 353d241c339f14e9bddf81d64a485859e57964b1 Mon Sep 17 00:00:00 2001
+From: RISE Project <noreply@anthropic.com>
+Date: Mon, 24 Aug 2026 19:21:28 +0200
+Subject: [PATCH] Add riscv64 cibuildwheel environment override
+
+The [tool.cibuildwheel.linux.environment] default sets x86-specific
+CFLAGS (-march=core2 -mno-ssse3), and the per-arch overrides cover
+aarch64 and armv7l but not riscv64. Building manylinux_riscv64 wheels
+therefore inherits the x86 default and fails at the C compile:
+
+    gcc: error: '-march=core2': ISA string must begin with rv32 or rv64
+    gcc: error: unrecognized command-line option '-mno-ssse3'
+
+Add a riscv64 override mirroring the aarch64 one, using the RVA-baseline
+flags used to build riscv64gc packages (matches the Yocto qemuriscv64
+toolchain: rv64imafdc + lp64d ABI).
+
+Upstream-Status: To upstream [riscv64 has no cibuildwheel override; x86 CFLAGS leak in]
+
+Signed-off-by: RISE Project <noreply@anthropic.com>
+---
+ pyproject.toml | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+diff --git a/pyproject.toml b/pyproject.toml
+index a26fa99..e570611 100644
+--- a/pyproject.toml
++++ b/pyproject.toml
+@@ -41,6 +41,11 @@ select = "*aarch64"
+ inherit.environment = "append"
+ environment = {CFLAGS = "-O3 -g0 -pipe -fPIC -DNDEBUG -march=armv8-a -mtune=cortex-a72", AR = "gcc-ar", NM = "gcc-nm", RANLIB = "gcc-ranlib"}
+
++[[tool.cibuildwheel.overrides]]
++select = "*riscv64"
++inherit.environment = "append"
++environment = {CFLAGS = "-O3 -g0 -pipe -fPIC -DNDEBUG -march=rv64imafdc_zicsr_zifencei -mabi=lp64d -fstack-protector-strong", AR = "gcc-ar", NM = "gcc-nm", RANLIB = "gcc-ranlib"}
++
+ [[tool.cibuildwheel.overrides]]
+ select = "*armv7l"
+ inherit.environment = "append"
+-- 
+2.43.0
+